发明名称 |
Dynamic block linking with individually configured plane parameters |
摘要 |
A multi-plane non-volatile memory die includes circuits that receive and apply different parameters to different planes while accessing planes in parallel so that different erase blocks are accessed using individualized parameters. Programming parameters, and read parameters can be modified on a block-by-block basis with modification based on the number of write-erase cycles or other factors. |
申请公布号 |
US9195584(B2) |
申请公布日期 |
2015.11.24 |
申请号 |
US201313741252 |
申请日期 |
2013.01.14 |
申请人 |
SanDisk Technologies Inc. |
发明人 |
Manohar Abhijeet;Avila Chris Nga Yee |
分类号 |
G06F12/02;G11C16/34 |
主分类号 |
G06F12/02 |
代理机构 |
Davis Wright Tremaine LLP |
代理人 |
Davis Wright Tremaine LLP |
主权项 |
1. An adaptable method of operating a flash memory die that includes two or more planes, comprising:
maintaining write-erase cycle counts for individual erase blocks in each of the two or more planes of the memory die; modifying operating parameters of individual erase blocks according to their respective write-erase cycle counts; and linking two or more individual erase blocks from different planes of the two or more planes of the memory die for parallel operation, the two or more individual erase blocks operated in parallel with different modified operating parameters based on their different respective write-erase cycle counts. |
地址 |
Plano TX US |