| 摘要 |
<p>A chip package (20) is disclosed that includes an electronic chip (10) having a plurality of die pads (14) formed on a top surface thereof, with a polyimide flex layer (22) positioned thereon by way of an adhesive layer (23). A plurality of vias (24) is formed through the polyimide flex layer (22) and the adhesive layer (23) corresponding to the die pads (14). A plurality of metal interconnects (28) are formed on the polyimide flex layer (22) each having a cover pad (31) covering a portion of a top surface (30) of the polyimide flex layer (22), a sidewall (36) extending down from the cover pad (31) and through the via (24) along a perimeter thereof, and a base (34) connected to the sidewall (36) and forming an electrical connection with a respective die pad (14). Each of the base (34) and the sidewall (36) is formed to have a thickness that is equal to or greater than a thickness of the adhesive layer (23).</p> |
