发明名称 Semiconductor memory devices and semiconductor systems including the same
摘要 Semiconductor systems are provided. The semiconductor system includes a controller and a semiconductor memory device. The controller generates a first command signal and receives a foreground data to generate a foreground control signal for controlling a drivability of the foreground data and to generate a second command signal. The semiconductor memory device receives the first command signal to output a pattern data as the foreground data through a foreground input/output (I/O) line, stores the foreground control signal therein in response to the second command signal, and controls the drivability of the foreground data according to the foreground control signal.
申请公布号 US9195617(B2) 申请公布日期 2015.11.24
申请号 US201314080206 申请日期 2013.11.14
申请人 SK Hynix Inc. 发明人 Gil Chan Gi
分类号 G06F3/00;G06F13/28;G06F13/12;G06F13/38;G06F13/10;G06F3/06;G06F11/10;G06F21/79 主分类号 G06F3/00
代理机构 William Park & Associates Ltd. 代理人 William Park & Associates Ltd.
主权项 1. A semiconductor system comprising: a controller configured to generate a first command signal, a foreground control signal for controlling a drivability of a foreground data and a second command signal; and a semiconductor memory device configured to output a pattern data as the foreground data through a foreground input/output (I/O) line in response to the first command signal, configured to store the foreground control signal therein in response to the second command signal, and configured to control the drivability of the foreground data according to the foreground control signal, wherein the drivability of the foreground data is controlled by a plurality of drivers according to the foreground drive signal, and wherein the foreground control signal is configured to be varied a level combination of the foreground control signal according to a delay time of the foreground data outputted through the foreground I/O line.
地址 Gyeonggi-do KR