发明名称 半導体集積回路
摘要 In one embodiment, a semiconductor integrated circuit includes power supply strap wires extending in a first direction in a first layer, auxiliary power supply strap wires extending in the first direction in a second layer below the first layer, and intermediate power supply wires each electrically connecting one of the power supply strap wires to one of the auxiliary power supply strap wires in a third layer between the first and second layers. The circuit further includes power supply rails extending in a second direction in a fourth layer below the second layer, and upper power supply strap wires extending in the second direction in a fifth layer above the first layer. An interval between the intermediate power supply wires is larger than an interval between the power supply rails, and is smaller than an interval between the upper power supply strap wires.
申请公布号 JP5820412(B2) 申请公布日期 2015.11.24
申请号 JP20130047194 申请日期 2013.03.08
申请人 株式会社東芝 发明人 内 海 哲 章
分类号 H01L21/822;H01L21/3205;H01L21/768;H01L21/82;H01L23/522;H01L27/04 主分类号 H01L21/822
代理机构 代理人
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