| 发明名称 | On-die termination apparatuses and methods | ||
| 摘要 | Apparatuses and methods are disclosed herein, including those, performed by a memory die, that operate to detect that a command on a bus connected to the memory die is addressed to another memory die responsive to a chip select signal, and to change the impedance of an on-die termination circuit of the memory die responsive to the detecting. | ||
| 申请公布号 | US9196321(B2) | 申请公布日期 | 2015.11.24 |
| 申请号 | US201314045521 | 申请日期 | 2013.10.03 |
| 申请人 | Micron Technology, Inc. | 发明人 | Huber Brian W.;Vankayala Vijay;Gross Brian;Howe Gary;Greeff Roy E. |
| 分类号 | G11C7/00;G11C7/02;G11C5/06;G11C7/10;G11C29/02 | 主分类号 | G11C7/00 |
| 代理机构 | Schwegman Lundberg & Woessner, P.A. | 代理人 | Schwegman Lundberg & Woessner, P.A. |
| 主权项 | 1. A method performed by a memory die, the method comprising: detecting that a read command on a bus connected to the memory die is addressed to another memory die responsive to a chip select command; and changing the impedance of an on-die termination (ODT) circuit of the memory die, on a rising edge of a system clock and responsive to the detecting that the read command on the bus connected to the memory die is addressed to the other memory die. | ||
| 地址 | Boise ID US | ||