Planar transformers having reduced termination losses

摘要

The present disclosure relates to planar transformers including a plurality of circuit layers that are configured to reduce termination losses on at least one of the plurality of circuit layers. The plurality of circuit layers are stacked together in a first direction and include at least first and second circuit layers. The first and second circuit layers each include an electrically conductive trace forming at least one winding having a first termination portion and a second termination portion that are separated by a gap. The gaps of the first and second circuit layers are offset relative to each other in a second direction different from the first direction. The plurality of circuit layers may further include a third circuit layer, which includes an electrically conductive trace having a grounded portion that is disposed adjacent to at least one of the gaps of the first and second circuit layers.

主权项

1. A planar transformer comprising:
a plurality of circuit layers stacked together in a first direction, the plurality of circuit layers including:
a first circuit layer;a second circuit layer; anda third circuit layer, wherein each of the first and second circuit layers includes an electrically conductive trace forming at least one winding having a first termination portion and a second termination portion defining a gap therebetween, wherein the gaps of the first and second circuit layers are offset relative to each other in a second direction different from the first direction, wherein the third circuit layer includes an electrically conductive trace that forms a grounded portion coupled to a ground, and wherein the grounded portion is adjacent to at least one of the gaps.