Method for resetting photoelectric conversion device, and photoelectric conversion device

摘要

A reset method of an photoelectric conversion device at least including a phototransistor having a first collector, a first base, and a first emitter, and a first field-effect transistor having a first source, a first drain, and a first gate, includes: connecting the first base, and one of the first source and the first drain of the first field-effect transistor by having a common region, or a continuous region, without a base electrode; supplying a base reset potential to the other of the first source and the first drain; and overlapping a time in which a first emitter potential is supplied to the first emitter and a time in which a first ON-potential that turns on the first field-effect transistor is supplied to the first gate.

主权项

1. A photoelectric conversion device comprising:
a first semiconductor region of a first conductivity type; a second semiconductor region of an opposite conductivity type opposite to the first conductivity type that is in contact with the first semiconductor region; a third semiconductor region of the opposite conductivity type that is separate from the second semiconductor region, and is in contact with the first semiconductor region; a fifth semiconductor region of the first conductivity type that is in contact with the second semiconductor region; a first insulating film that is provide on at least a surface of the first semiconductor region sandwiched between at least the second and third semiconductor regions; and a first gate that is provided on the first insulating film across the second and third semiconductor regions,wherein the second semiconductor region, or the first semiconductor region in a vicinity of the second semiconductor region is illuminated by light, and a photocurrent flows between the second semiconductor region and the first semiconductor region, and a time in which a first emitter potential is supplied to the fifth semiconductor region overlaps with a time in which a base reset potential is supplied to the third semiconductor region and a first gate potential that induces a channel or a current path on the surface of the first semiconductor region between the second and third semiconductor regions under the first gate is supplied to the first gate.