Class-F CMOS oscillator incorporating differential passive network

摘要

A novel and useful oscillator topology demonstrating an improved phase noise performance that exploits the time-variant phase noise model with insights into the phase noise conversion mechanisms. The oscillator is based on enforcing a pseudo-square voltage waveform around an LC tank by increasing the third-harmonic of the fundamental oscillation voltage through an additional impedance peak. Alternatively, the oscillator is based on enforcing clipped oscillation waveform by increasing the second harmonic of the fundamental oscillation voltage through an additional impedance peak. This auxiliary impedance peak is realized by a transformer with moderately coupled resonating windings. As a result, the effective impulse sensitivity function (ISF) decreases thus reducing the oscillator's effective noise factor such that a significant improvement in the oscillator phase noise and power efficiency are achieved.

主权项

1. An oscillator circuit, comprising:
an active network having an input and an output, said active network operative to generate an active signal for sustaining the oscillation of said oscillator circuit; a passive differential network having an input and an output, said passive differential network including a transformer based tank circuit coupled to said active network and operative to generate a passive signal coupled to said active network input; wherein said differential passive network has a first input impedance magnitude peak at a first frequency f1 and a second input impedance magnitude peak at a second frequency f2; and wherein said oscillator circuit is operative to oscillate only at said first frequency.