发明名称 |
Methods and apparatus for modeling and simulating spintronic integrated circuits |
摘要 |
Described are apparatus and method for simulating spintronic integrated circuit (SPINIC), the method comprising: generating a spin netlist indicating connections of spin nodes of spin circuits and nodes of general circuits; and modifying a modified nodal analysis (MNA) matrix for general circuits to generate a spin MNA matrix for solving spin circuits and general circuits of the spin netlist. |
申请公布号 |
US9195787(B2) |
申请公布日期 |
2015.11.24 |
申请号 |
US201213682358 |
申请日期 |
2012.11.20 |
申请人 |
Intel Corporation |
发明人 |
Manipatruni Sasikanth;Nikonov Dmitri E.;Young Ian A. |
分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
Blakely, Sokoloff, Taylor & Zafman LLP |
代理人 |
Blakely, Sokoloff, Taylor & Zafman LLP |
主权项 |
1. A computer implemented method for simulating spintronic integrated circuit, the method comprising:
generating, by a processor, a spin netlist indicating connections of spin nodes of spin circuits and nodes of general circuits; expressing the spin netlist as matrices of spin conduction elements; and generating, by the processor, a spin modified nodal analysis (MNA) matrix using the matrices of spin conduction elements for solving spin circuits and general circuits of the spin netlist. |
地址 |
Santa Clara CA US |