发明名称 Circuits for self-reconfiguration or intrinsic functional changes of chips before vs. after stacking
摘要 A method and system for testing one or more semiconductor structures, for example, chips or wafers, in a three-dimensional stack. The method and system includes controlling a logic signal of a first circuit in a first chip or wafer connected to a supply voltage to indicate a first state during pre-assembly testing of the first chip or wafer. The method and system further includes controlling the logic signal to indicate a second state when the first circuit is connected to a second circuit of a second chip or wafer resulting in a combined circuit. The combined circuit is in a three-dimensional chip or wafer stack during post-assembly testing of the three-dimensional chip or wafer stack.
申请公布号 US9194912(B2) 申请公布日期 2015.11.24
申请号 US201213688336 申请日期 2012.11.29
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 Robson Norman W.;Fainstein Daniel J.
分类号 G01R31/02;G01R31/3185 主分类号 G01R31/02
代理机构 代理人 Petrocelli Michael A.
主权项 1. A method for testing one or more semiconductor structures for a three-dimensional structure stack, comprising: controlling a logic signal of a first circuit which includes a first electrical element, the first circuit being part of a first semiconductor structure connected to a supply voltage, the first circuit configured to indicate a first state during pre-assembly testing of the first semiconductor structure, the supply voltage being part of the first circuit at the pre-assembly testing; and controlling the logic signal using the supply voltage of the first circuit to indicate a second state in response to the first circuit being connected to a second circuit which includes a second electrical element, the second circuit being part of a second semiconductor structure and the connection of the first and second circuits resulting in a combined circuit, the combined circuit being in a three-dimensional semiconductor structure stack comprising the first and second semiconductor structures during post-assembly testing of the three-dimensional semiconductor structure stack.
地址 Armonk NY US