发明名称 VIDEO PROCESSING CIRCUIT AND RELATED METHOD FOR MERGING VIDEO OUTPUT STREAMS WITH DATA STREAM FOR TRANSMISSION
摘要 A video processing circuit includes a video generating unit for generating a video output stream, a data generating unit (e.g. graphic generating unit) for providing a data stream (e.g. graphical stream), and a communication interface circuit. The communication interface circuit has a mode provided for merging the video output stream and the graphical stream to transmit a first merged signal through a channel. In the mode, the communication interface circuit merges the video output stream and the data stream by increasing a working frequency of the communication interface circuit to increase bandwidths of the channel, using positions for transmitting a portion of video control signals in the video output stream to transmit the data stream, and compressing the video output stream. The communication interface circuit may have another mode provided for mixing the video output stream and the data stream to transmit a mixed video output stream through the channel.
申请公布号 US2015334312(A1) 申请公布日期 2015.11.19
申请号 US201514807900 申请日期 2015.07.24
申请人 MEDIATEK INC. 发明人 Shih Yang-Hung;Lin Hung-Der;Po Tang-Hung;Chiu Sau-Kwo
分类号 H04N5/265;H04N19/44;H04N21/431;H04N7/08;H04N21/44;H04N5/445 主分类号 H04N5/265
代理机构 代理人
主权项 1. A video processing circuit, comprising: a video generating unit for generating a video output stream according to a video input stream; a data generating unit for providing a data stream; and a communication interface circuit, coupled to the video generating unit and the data generating unit, the communication interface circuit having a mode provided for merging the video output stream and the data stream to transmit a first merged signal through a channel, wherein in the mode, a first part of bandwidth of the channel is utilized for transmitting the video output stream and a second part of bandwidth of the channel is utilized for transmitting the data stream; wherein in the mode, the communication interface circuit merges the video output stream and the data stream by compressing the video output stream.
地址 Hsin-Chu TW