发明名称 |
RESISTIVE MEMORY STRUCTURE FOR SINGLE OR MULTI-BIT DATA STORAGE |
摘要 |
A resistive memory structure comprises at least one resistive memory element configured to store one or more bits of data and a circuit electrically connected to the resistive memory element for use in performing at least one of a read or write operation on the at least one resistive memory element. The circuit includes a resistor electrically connected in series to the resistive memory element thereby forming a voltage divider and electrical node therebetween, and an interpretation circuit electrically connected to the electrical node formed between the resistive memory element and the resistor. The interpretation circuit is configured to interpret a voltage at the electrical node and to determine a resistive state of the resistive memory element based on the voltage at the electrical node. |
申请公布号 |
US2015332763(A1) |
申请公布日期 |
2015.11.19 |
申请号 |
US201314653203 |
申请日期 |
2013.12.17 |
申请人 |
THE REGENTS OF THE UNIVERSITY OF MICHIGAN |
发明人 |
YILMAZ Yalcin;MAZUMDER Pinaki |
分类号 |
G11C13/00 |
主分类号 |
G11C13/00 |
代理机构 |
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代理人 |
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主权项 |
1. A resistive memory structure, comprising:
at least one resistive memory element configured to store one or more bits of data; and a circuit electrically connected to the resistive memory element for use in performing at least one of a read or write operation on the at least one resistive memory element, the circuit including:
a resistor electrically connected in series to the resistive memory element thereby forming a voltage divider and electrical node therebetween; andan interpretation circuit electrically connected to the electrical node formed between the resistive memory element and the serially connected resistor, the interpretation circuit configured to interpret a voltage at the electrical node and to determine a resistive state of the resistive memory element based on the voltage at the electrical node. |
地址 |
Ann Arbor MI US |