| 摘要 |
This is a multi-level converter comprising at least one arm (B) formed of n stages (Et1, Et2, . . . , Etn) mounted in cascade. The first stage (Et1) comprises a single switching structure (Ce10) with four voltage levels and an ith stage (i lying between two and n) comprises i identical switching structures (Cei1, Cei2, . . . Ceii) with four voltage levels, mounted in series. Each switching structure with four voltage levels comprises a cell of floating capacitor type (T1, T2, T1′, T2′, C12), two basic switching cells (T3u, T3′u; T3l, T3′l) and a capacitive divider bridge (C9, C10, C11), the basic switching cells being connected between the voltage divider bridge and the cell of floating capacitor type. |
| 主权项 |
1. Multi-level converter comprising at least one arm (B) formed of several stages of rank one to n (n an integer greater than one) (Et1, Et2, . . . , Etn) mounted in cascade, the stage of rank 1 (Et1) being intended to be connected to a current source (I) and the stage of rank n (Etn) being intended to be connected to a voltage source (VDC), characterized in that the stage of rank one (Et1) comprises a single switching structure with four voltage levels (Ce10) and a stage of rank i (i lying between two and n) comprises i identical switching structures with four voltage levels (Cei1, Cei2, . . . Ceii) mounted in series, each of these switching structures comprising a cell of floating capacitor type (T1, T2, T1′, T2′, C12) with three voltage levels comprising a quadruplet of elementary switches in series (T1, T2, T1′, T2′) possessing a middle node (S), two basic cells (T3u, T3′u; T3l, T3′l) each formed of a pair of elementary switches (T3u, T3′u; T3l, T3′l) in series exhibiting two extreme terminals (N6, N7; N8, N9) and a midpoint and a capacitive divider bridge (C9, C10, C11) having two ends and formed of a triplet of energy storage devices (C9, C10, C11) mounted in series, of which two energy storage devices (C9, C11) are in the extreme position, each energy storage device (C9, C11) in the extreme position being connected to the extreme terminals (N6, N9) of a different basic switching cell, a midpoint of each basic switching cell being connected to a different end of the quadruplet of elementary switches (T1, T2, T1′, T2′), the middle node of each cell of floating capacitor type of the stage of rank i being connected to an end of the capacitive divider bridge of a switching structure with four voltage levels of the stage of rank i−1. |
