发明名称 Low Power Nanoelectronics
摘要 Disclosed are low power electronic devices configured to exploit the sub-threshold swing, unidirectional tunneling, and low-voltage operation of steep slope-tunnel tunnel field-effect transistors (TFET) to improve power-conversion efficiency and power-efficiency of electrical systems incorporating the TFET as an electrical component to perform energy harvesting, signal processing, and related operations. The devices include a HTFET-based rectifier having various topologies, a HTFET-based DC-DC charge pump converter, a HTFET-based amplifier having an amplifier circuit including a telescopic operational transconductance amplifier, and a HTFET-based SAR A/D converter having a HTFET-based transmission gate DFF. Any one of the devices may be used to generate a RF-powered system with improved power conversion efficiencies of power harvesters and power efficiencies of processing components within the system.
申请公布号 US2015333534(A1) 申请公布日期 2015.11.19
申请号 US201514712182 申请日期 2015.05.14
申请人 The Penn State Research Foundation 发明人 Liu Huichu;Vaddi Ramesh;Narayanan Vijaykrishnan;Datta Suman;Seok Kim Moon;Li Xueqing;Schmid Alexandre;Shoaran Mahsa;Heo Unsuk
分类号 H02J5/00 主分类号 H02J5/00
代理机构 代理人
主权项 1. An RF powered system, comprising: a power harvesting and management block configured to receive an RF signal, including an impedance matching component configured to maximize power transfer from the received RF signal, a rectifier component configured to convert alternating current generated by the RF signal to direct current, a DC-DC converter component configured to boost output voltage of the rectifier component, and a voltage regulator configured to provide a constant output voltage, wherein the rectifier component comprises a stage including: a first rectifier TFET having a source, a gate, and a drain;a second rectifier TFET having a source, a gate, and a drain;a third rectifier TFET having a source, a gate, and a drain; and,a fourth rectifier TFET having a source, a gate, and a drain;wherein the first rectifier TFET is a N-type TFET;wherein the second rectifier TFET is a P-type TFET;wherein the third rectifier TFET is a N-type TFET;wherein the fourth rectifier TFET is a P-type TFET;wherein the source of the first rectifier TFET, the source of the second rectifier TFET, the gate of the third rectifier TFET, and the gate of the fourth rectifier TFET are connected at a first rectifier node;wherein the gate of the first rectifier TFET, the gate of the second rectifier TFET, the source of the third rectifier TFET and the source of the fourth rectifier TFET are connected at a second rectifier node;wherein the drain of the first rectifier TFET and the drain of the third rectifier TFET are connected at a third rectifier node; and,wherein the drain of the second rectifier TFET and the drain of the fourth rectifier TFET are connected at a fourth rectifier node; and, an analog/RF front end and digital storage/processing block configured to receive at least one of the RF signal via a receiver and sensor signal from a sensor, process at least one of the RF signal and the sensor signal, and transmit the at least one processed RF signal and sensor signal via a transmitter.
地址 University Park PA US