发明名称 |
LITHOGRAPHIC STACK EXCLUDING SiARC AND METHOD OF USING SAME |
摘要 |
A lithographic stack over a raised structure (e.g., fin) of a non-planar semiconductor structure, such as a FinFET, includes a bottom layer of spin-on amorphous carbon or spin-on organic planarizing material, a hard mask layer of a nitride and/or an oxide on the spin-on layer, a layer of a developable bottom anti-reflective coating (dBARC) on the hard mask layer, and a top layer of photoresist. The stack is etched to expose and recess the raised structure, and epitaxial structure(s) are grown on the recess. |
申请公布号 |
US2015332934(A1) |
申请公布日期 |
2015.11.19 |
申请号 |
US201414281359 |
申请日期 |
2014.05.19 |
申请人 |
GLOBALFOUNDRIES INC. |
发明人 |
YU Hong;HU Xiang;LUN Zhao;LIU Huang |
分类号 |
H01L21/311;H01L29/66;H01L29/78;H01L29/12;H01L29/06;H01L21/3105;H01L21/02 |
主分类号 |
H01L21/311 |
代理机构 |
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代理人 |
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主权项 |
1. A method, comprising:
providing a non-planar semiconductor structure, the structure comprising a semiconductor substrate, at least one raised semiconductor structure coupled to the substrate, at least one dummy gate structure encompassing an exposed portion of the at least one raised structure, and a lithographic stack conformally covering the non-planar structure; wherein the lithographic stack comprises a layer of spin-on material, a hard mask layer above the spin-on layer, a layer of developable bottom anti-reflective coating (dBARC) above the hard mask layer and a layer of lithographic blocking material above the dBARC layer; and etching the lithographic stack to expose at least one region of one or more of the at least one raised structure. |
地址 |
Grand Cayman KY |