发明名称 OFF-CHIP VIAS IN STACKED CHIPS
摘要 A microelectronic assembly includes first and second stacked microelectronic elements, each having spaced apart traces extending along a front face and beyond at least a first edge thereof. An insulating region can contact the edges of each microelectronic element and at least portions of the traces of each microelectronic element extending beyond the respective first edges. The insulating region can define first and second side surfaces adjacent the first and second edges of the microelectronic elements. A plurality of spaced apart openings can extend along a side surface of the microelectronic assembly. Electrical conductors connected with respective traces can have portions disposed in respective openings and extending along the respective openings. The electrical conductors may extend to pads or solder balls overlying a face of one of the microelectronic elements.
申请公布号 US2015333042(A1) 申请公布日期 2015.11.19
申请号 US201514725975 申请日期 2015.05.29
申请人 Tessera, Inc. 发明人 Haba Belgacem;Mohammed Ilyas;Oganesian Vage;Ovrutsky David;Mirkarimi Laura Wills
分类号 H01L25/065;H01L25/00 主分类号 H01L25/065
代理机构 代理人
主权项 1. A microelectronic device having at least two side external surfaces; said microelectronic device comprising: a first substrate; a first microelectronic element comprising a front face bonded to said first substrate and an opposing rear face; said first microelectronic element further comprising a plurality of first traces extending along said front face; at least a portion of each said first trace extending beyond a first edge of said first microelectronic element; said first microelectronic element further comprising a second edge opposite said first edge; a first insulating region disposed around said first and second edges of said first microelectronic element; a second microelectronic element comprising a front face facing said opposing rear face of said first microelectronic element; said second microelectronic element further comprising a plurality of second traces extending along said front face; at least a portion of each said second trace extending beyond a first edge of said second microelectronic element; said second microelectronic element further comprising a second edge opposite said first edge; a second insulating region disposed around said first and second edges of said second microelectronic element; and at least one electrical conductor disposed on at least one of said side external surfaces of said microelectronic device; said electrical conductor being in electric contact with a cross-sectional edge of at least one of said plurality of said first and second traces.
地址 San Jose CA US