| 摘要 |
The present invention discloses a transient voltage suppression element and a manufacturing method, wherein four junction portions of P-type and N-type are formed to reduce capacitance, and is possible to suppress signal loss by a low capacitance. The transient voltage suppression element comprises: a first conductive substrate; a second conductive embedding layer formed on an upper portion of the substrate; a first conductive epitaxial layer formed on the upper portions of the substrate and the embedding layer; a second conductive well area formed inwards from a surface of the epitaxial layer; a first isolation layer, a second isolation layer, and a third isolation layer formed from the surface of the epitaxial layer toward the substrate in an inner periphery of the well area, an outer periphery, and an area separated from the outer periphery to the outside; a second conductive area formed inwards from the surface of the epitaxial layer in the first isolation layer; a first conductive area A formed inwards from a part of the surface of the well area; a first conductive area B formed inwards from the surface of the epitaxial layer between the second isolation layer and the third isolation layer; an insulating film formed to expose a part of the well area, the second conductive area, the first conductive area A, and the first conductive area B in an area corresponding to a circumference of the well area, the second conductive area, the first conductive area A, and the first conductive area B; and an electrode formed on the surface of the well area, the second conductive area, the first conductive area A, and the first conductive area B exposed through the insulating film. |
