发明名称 半導体装置
摘要 In an active region, p+ regions are selectively disposed in a surface layer of an n− drift layer on an n+ semiconductor substrate. A p-base layer is disposed on surfaces of the n− drift layer and the P+ regions, and an MOS structure is disposed on the p-base layer. In another portion of the active region, a p+ region is disposed to be in contact with the source electrode on the p+ regions. In a breakdown voltage structure region (100), a JTE structure having at least a P− region is disposed separately from the P+ regions and the p-base layer, to surround the active region. The P− region is electrically in contact with the P+ region in a portion in which the MOS structure is not formed, in the vicinity of the boundary between the active region and the breakdown voltage structure region.
申请公布号 JP5818099(B2) 申请公布日期 2015.11.18
申请号 JP20120104230 申请日期 2012.04.27
申请人 国立研究開発法人産業技術総合研究所;富士電機株式会社 发明人 岩室 憲幸;星 保幸;原田 祐一;原田 信介
分类号 H01L29/06;H01L21/336;H01L29/12;H01L29/78 主分类号 H01L29/06
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