SEMECONDUCTOR APPARATUS WITH PREVENTING REFRESH ERROR AND MEMORY SYSTEM USING THE SAME

摘要

The present technique may include a plurality of memory banks configured to perform a refresh operation in response to an address count value and row active signals; a refresh control part configured to update refresh bank information which defines a bank designated to perform the refresh operation in the memory banks in response to a refresh command and bank addresses, and activate a count control signal in response to the refresh bank information; and a counter configured to change the address count value in response to activation of the count control signal.