发明名称 |
Three-dimensional chip-to-wafer integration |
摘要 |
An integrated circuit device is disclosed that includes a semiconductor substrate and a die attached to the semiconductor substrate. A conductive pillar is connected to at least one of the semiconductor substrate or the die. An overmold is molded onto the semiconductor substrate over the die, and the conductive pillar extends through the overmold. |
申请公布号 |
US9190391(B2) |
申请公布日期 |
2015.11.17 |
申请号 |
US201113281534 |
申请日期 |
2011.10.26 |
申请人 |
Maxim Integrated Products, Inc. |
发明人 |
Kelkar Amit Subhash;Thambidurai Karthik;Khandekar Viren;Nguyen Hien D. |
分类号 |
H01L21/00;H01L25/065;H01L23/00;H01L23/538;H01L23/31;H01L21/56;H01L25/00 |
主分类号 |
H01L21/00 |
代理机构 |
Advent, LLP |
代理人 |
Advent, LLP |
主权项 |
1. A semiconductor device comprising:
a semiconductor substrate comprising a first die, the semiconductor substrate comprising electrical circuitry; a second die attached to the semiconductor substrate, the second die attached to the semiconductor substrate in a face-down orientation, the second die comprising a die attach pad; a third die attached to the second die in a face-up orientation, the third die attached to the die attach pad of the second die, the second die and the third die stacked in direct contact; an overmold molded onto the semiconductor substrate over the second die and the third die; a conductive pillar connected directly to at least one of the electrical circuitry of the semiconductor substrate, or the second die, or the third die, the conductive pillar extending through the overmold, wherein the footprint of the semiconductor device is the same as the footprint of the first die; a redistribution layer formed on the overmold; and a plurality of solder bumps formed on the redistribution layer, at least one of the plurality of solder bumps connected to the conductive pillar via the redistribution layer. |
地址 |
San Jose CA US |