发明名称 |
High density substrate routing in BBUL package |
摘要 |
Discussed generally herein are devices that include high density interconnects between dice and techniques for making and using those devices. In one or more embodiments a device can include a bumpless buildup layer (BBUL) substrate including a first die at least partially embedded in the BBUL substrate, the first die including a first plurality of high density interconnect pads. A second die can be at least partially embedded in the BBUL substrate, the second die including a second plurality of high density interconnect pads. A high density interconnect element can be embedded in the BBUL substrate, the high density interconnect element including a third plurality of high density interconnect pads electrically coupled to the first and second plurality of high density interconnect pads. |
申请公布号 |
US9190380(B2) |
申请公布日期 |
2015.11.17 |
申请号 |
US201213707159 |
申请日期 |
2012.12.06 |
申请人 |
Intel Corporation |
发明人 |
Teh Weng Hong;Chiu Chia-Pin |
分类号 |
H01L21/00;H01L23/00;H01L23/538;H01L23/31;H01L21/56 |
主分类号 |
H01L21/00 |
代理机构 |
Schwegman Lundberg & Woessner, P.A. |
代理人 |
Schwegman Lundberg & Woessner, P.A. |
主权项 |
1. A method of making a BBUL substrate with a high density interconnect element embedded therein comprising:
situating a first die including a first plurality of high density interconnect pads on a substrate carrier; situating a second die including a second plurality of high density interconnect pads on the substrate carrier; forming a first buildup layer around and over the first and second dies; forming a cavity in the buildup layer such that high density interconnect pads on the first and second dice are exposed; and situating the high density interconnect element in the cavity. |
地址 |
Santa Clara CA US |