Semiconductor apparatus including plurality of chips being divided into plurality of planes

摘要

A semiconductor apparatus includes a control chip including a first selection unit configured to output one of signals which are inputted through a first normal port and a shared test port, in response to a test mode signal; and a second selection unit configured to output one of signals which are inputted through a second normal port and the shared test port, in response to the test mode signal, wherein the control chip is configured to transmit an output of the first selection unit to a first chip and transmit an output of the second selection unit to a second chip.

主权项

1. A semiconductor apparatus comprising:
a control chip including a first selection unit configured to output one of signals which are inputted through a first normal port and a main test port, in response to a test mode signal; a second selection unit configured to output one of signals which are inputted through a second normal port and the main test port, in response to the test mode signal; a first channel transmission unit configured to transmit the output of the first selection unit to one of first and second planes of the first chip through a first channel in response to a first chip select signal and a channel select signal; and a second channel transmission unit configured to transmit the output of the second selection unit to one of third and fourth planes of the second chip through a second channel in response to a second chip select signal and the channel select signal, wherein the first and second normal ports are connected to a controller, wherein the main test port is not connected to the controller and is connected to a test equipment.