发明名称 |
Field-effect transistor |
摘要 |
The field-effect transistor comprising: a semiconductor laminated structure comprising a first layer of a first nitride semiconductor, a second layer of a second nitride semiconductor having a bandgap larger than that of the first nitride semiconductor, and a two-dimensional electron gas layer; a source electrode; a drain electrode; and a gate electrode disposed over the second layer, the gate electrode being adapted to control the flow of electrons passing through the two-dimensional electron gas layer; a third layer of a p-type nitride semiconductor containing p-type dopant between the gate electrode and the second layer; and a fourth layer of a nitride semiconductor between the third layer and the gate electrode, wherein the fourth layer is in contact with the gate electrode, and wherein the fourth layer is an undoped layer which has a larger bandgap than that of the third layer. |
申请公布号 |
US9190506(B2) |
申请公布日期 |
2015.11.17 |
申请号 |
US201314135313 |
申请日期 |
2013.12.19 |
申请人 |
Nichia Corporation |
发明人 |
Tanimoto Masashi |
分类号 |
H01L29/778;H01L29/43;H01L29/66;H01L29/417;H01L29/10;H01L29/22;H01L29/20 |
主分类号 |
H01L29/778 |
代理机构 |
Foley & Lardner LLP |
代理人 |
Foley & Lardner LLP |
主权项 |
1. A field-effect transistor comprising:
a semiconductor laminated structure comprising a first semiconductor layer formed of a first nitride semiconductor, a second semiconductor layer formed of a second nitride semiconductor having a bandgap energy larger than that of the first nitride semiconductor, and a two-dimensional electron gas layer generated at an interface on the second semiconductor layer side of the first semiconductor layer; a source electrode; a drain electrode; and a gate electrode disposed over the second semiconductor layer, the gate electrode being adapted to control the flow of electrons passing through the two-dimensional electron gas layer between the source electrode and the drain electrode; a third semiconductor layer formed of a p-type nitride semiconductor containing p-type dopant between the gate electrode and the second semiconductor layer; and a fourth semiconductor layer formed of a nitride semiconductor between the third semiconductor layer and the gate electrode, wherein the fourth semiconductor layer is in contact with the gate electrode, and wherein the fourth semiconductor layer is an undoped layer which has a larger bandgap than that of the third semiconductor layer. |
地址 |
Anan-shi JP |