发明名称 Diode structure and method for FINFET technologies
摘要 A method of fabricating an electronic device includes the following steps. A SOI wafer is provided having a SOI layer over a BOX. An oxide layer is formed over the SOI layer. At least one first set and at least one second set of fins are patterned in the SOI layer and the oxide layer. A conformal gate dielectric layer is selectively formed on a portion of each of the first set of fins that serves as a channel region of a transistor device. A first metal gate stack is formed on the conformal gate dielectric layer over the portion of each of the first set of fins that serves as the channel region of the transistor device. A second metal gate stack is formed on a portion of each of the second set of fins that serves as a channel region of a diode device.
申请公布号 US9190419(B2) 申请公布日期 2015.11.17
申请号 US201313761430 申请日期 2013.02.07
申请人 发明人 Chang Josephine B.;Lauer Isaac;Lin Chung-Hsun;Sleight Jeffrey W.
分类号 H01L21/8238;H01L27/12;H01L29/861;H01L21/84;H01L29/66;H01L29/78 主分类号 H01L21/8238
代理机构 代理人 Chang, LLC Michael J.
主权项 1. A method of fabricating an electronic device, comprising the steps of: providing a semiconductor-on-insulator (SOI) wafer having a SOI layer over a buried oxide (BOX); forming an oxide layer over the SOI layer; patterning at least one first set of fins in the SOI layer and the oxide layer and at least one second set of fins in the SOI layer and the oxide layer; forming a first dummy gate over a portion of each of the first set of fins that serves as a channel region of a transistor device; forming a second dummy gate over a portion of each of the second set of fins that serves as a channel region of a diode device; depositing a filler layer around the first dummy gate and the second dummy gate; removing the first dummy gate to expose the portion of the first set of fins that serves as the channel region of the transistor device within a first trench in the filler layer; removing the second dummy gate to expose the portion of the second set of fins that serves as the channel region of the diode device within a second trench in the filler layer; selectively forming a conformal gate dielectric layer on the portion of each of the first set of fins that serves as the channel region of the transistor device; forming a first metal gate stack on the conformal gate dielectric layer over the portion of each of the first set of fins that serves as the channel region of the transistor device; and forming a second metal gate stack on the portion of each of the second set of fins that serves as the channel region of the diode device.
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