发明名称 Nanogap device with capped nanowire structures
摘要 An anti-retraction capping material is formed on a surface of a nanowire that is located upon a dielectric membrane. A gap is then formed into the anti-retraction capping material and nanowire forming first and second capped nanowire structures of a nanodevice. The nanodevice can be used for recognition tunneling measurements including, for example DNA sequencing. The anti-retraction capping material serves as a mobility barrier to pin, i.e., confine, a nanowire portion of each of the first and second capped nanowire structures in place, allowing long-term structural stability. In some embodiments, interelectrode leakage through solution during recognition tunneling measurements can be minimized.
申请公布号 US9188578(B2) 申请公布日期 2015.11.17
申请号 US201314041922 申请日期 2013.09.30
申请人 GLOBALFOUNDRIES INC. 发明人 Astier Yann A. N.;Bai Jingwei;Papa Rao Satyavolu S.;Reuter Kathleen B.;Smith Joshua T.
分类号 G01N33/487;B01L3/00;B81C1/00;H01L29/06;H01L29/41 主分类号 G01N33/487
代理机构 Cantor Colburn LLP 代理人 Cantor Colburn LLP
主权项 1. A method for forming a nanogap device, said method comprising: providing a dielectric membrane directly on top of a front-side surface of a semiconductor substrate; forming a nanowire directly on top of a surface of said dielectric membrane; forming a first metal pad and a second metal pad directly on top of said nanowire; depositing an anti-retraction capping material on an upper surface of said nanowire as well as directly on top of the first metal pad and the second metal pad; cutting said anti-retraction capping material and said nanowire to provide a first capped nanowire structure and a second capped nanowire structure, wherein said first capped nanowire structure and said second capped nanowire structure are separated by a nanogap of less than 3 nanometers forming an opening in a back-side surface of said semiconductor substrate after said providing said dielectric membrane and prior to said forming said nanowire; wherein said opening is formed of a first tapered sidewall and a second tapered sidewall of said semiconductor substrate, said first tapered sidewall stopping at a first point directly contacting said dielectric membrane and said second tapered sidewall stopping at a second point directly contacting said dielectric membrane; wherein said first point is between said first metal pad and said nanogap, such that said first point is closer to said nanogap than said first metal pad is to said nanogap; and wherein said second point is between said second metal pad and said nanogap, such that said second point is closer to said nanogap than said second metal pad is to said nanogap.
地址 Grand Cayman KY