发明名称 被覆されたワイヤの中へのチップ素子の組み込み
摘要 <p>A method for forming a sheathed wire includes the steps of: axially advancing a core through a sheathing zone; wrapping a sheathing fiber around the core in the sheathing zone; and providing, in the sheathing zone, a series of microelectronic chip elements each provided with a wire section, in such a way that the sheathing fiber that wraps around the core also wraps around a chip element and the wire section thereof to form a sheathed wire incorporating spaced-apart chip elements.</p>
申请公布号 JP5815692(B2) 申请公布日期 2015.11.17
申请号 JP20130515940 申请日期 2011.06.23
申请人 发明人
分类号 G06K19/077 主分类号 G06K19/077
代理机构 代理人
主权项
地址