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发明名称
电晶体元件及其形成方法;TRANSISTOR DEVICE AND METHODS FOR FORMING THE SAME
摘要
本揭示为有关于形成电晶体元件的方法及相关设备,电晶体元件具有包含夹层式薄膜叠层的通道区,夹层式薄膜叠层具有改善元件效能的复数个不同层。在一些实施例中,此方法透过选择性地蚀刻半导体基底以沿着半导体基底的上表面形成凹口实施。夹层式薄膜叠层具有复数个嵌入层形成于凹口内,这些嵌入层的至少两层包含不同的材料,以改善电晶体元件不同方面的效能。闸极结构形成于夹层式薄膜叠层上,闸极结构控制具有夹层式薄膜叠层之通道区内的电荷载子的流动,夹层式薄膜叠层横向地设置于半导体基底内的源极区与汲极区之间。
申请公布号
TW201543578
申请公布日期
2015.11.16
申请号
TW103146209
申请日期
2014.12.30
申请人
台湾积体电路制造股份有限公司 TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
发明人
萧茹雄 HSIAO, RU SHANG;王琳松 WANG, LING SUNG;黄智睦 HUANG, CHIH MU;詹晴尧 CHAN, CING YAO;王骏颖 WANG, CHUN YING;王仁磐 WANG, JEN PAN
分类号
H01L21/336(2006.01);H01L29/78(2006.01);H01L21/22(2006.01)
主分类号
H01L21/336(2006.01)
代理机构
代理人
洪澄文颜锦顺
主权项
地址
新竹市新竹科学工业园区力行六路8号 TW
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