发明名称 Slot-Shielded Coplanar Strip-line Compatible with CMOS Processes
摘要 A strip-line includes a ground plane extending through a plurality of dielectric layers over a substrate; a signal line over the substrate and on a side of the ground plane; a first plurality of metal strips under the signal line and in a first metal layer, wherein the first plurality of metal strips is parallel to each other, and is spaced apart from each other by spaces; and a second plurality of metal strips under the signal line and in a second metal layer over the first metal layer. The second plurality of metal strips vertically overlaps the spaces. The first plurality of metal strips is electrically coupled to the second plurality of metal strips through the ground plane, and no via physically contacts the first plurality of metal strips and the second plurality of metal strips.
申请公布号 US2015325513(A1) 申请公布日期 2015.11.12
申请号 US201514802267 申请日期 2015.07.17
申请人 Taiwan Semiconductor Manufacturing Company, Ltd. 发明人 Lin Yu-Ling;Yen Hsiao-Tsung;Chen Ho-Hsiang;Kuo Chin-Wei;Jou Chewn-Pu
分类号 H01L23/522;H01L23/528;H01L23/64 主分类号 H01L23/522
代理机构 代理人
主权项 1. A device comprising: a semiconductor substrate; a ground plane overlying the semiconductor substrate, wherein the ground plane is grounded; a first signal line over the semiconductor substrate and parallel to the ground plane; a plurality of p-well strips in the semiconductor substrate; a plurality of n-well strips in the semiconductor substrate, with the plurality of p-well strips and the plurality of n-well strips disposed in an alternating layout, wherein each of the plurality of p-well strips and the plurality of n-well strips comprises a first portion overlapped by a portion of the first signal line and a second portion overlapped by a portion of the ground plane; and electrical connections electrically coupling the plurality of p-well strips and the plurality of n-well strips to the ground plane.
地址 Hsin-Chu TW
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