发明名称 |
INTEGRATED CIRCUITS HAVING IMPROVED GATE STRUCTURES AND METHODS FOR FABRICATING SAME |
摘要 |
Integrated circuits with improved gate structures and methods for fabricating integrated circuits with improved gate structures are provided. In an embodiment, a method for fabricating an integrated circuit includes providing a semiconductor substrate with fin structures. A gate-forming material is deposited over the semiconductor substrate and fin structures. The method includes performing a first etch process to etch the gate-forming material to form a gate line having a first side and a second side. The first side and second side of the gate line are bounded with material. The method includes performing a second etch process to etch a portion of the gate line bound by the material to separate the gate line into adjacent gate structures and to define a tip-to-tip distance between the adjacent gate structures. |
申请公布号 |
US2015325482(A1) |
申请公布日期 |
2015.11.12 |
申请号 |
US201414272952 |
申请日期 |
2014.05.08 |
申请人 |
GLOBALFOUNDRIES, Inc. |
发明人 |
Hu Xiang;Liu Huang |
分类号 |
H01L21/8234;H01L29/49;H01L29/66;H01L21/28;H01L21/3105;H01L21/3213;H01L21/311;H01L27/088;H01L21/308 |
主分类号 |
H01L21/8234 |
代理机构 |
|
代理人 |
|
主权项 |
1. A method for fabricating an integrated circuit, the method comprising;
providing a semiconductor substrate with fin structures; depositing a gate-forming material over the semiconductor substrate and fin structures; performing a first etch process to etch the gate-forming material to form a gate line having a first side and a second side; bounding the first side and second side of the gate line with material; performing a second etch process to remove a portion of the gate line bounded by the material to separate the gate line into adjacent gate structures and to define a tip-to-tip distance between the adjacent gate structures. |
地址 |
Grand Cayman KY |