主权项 |
1. A system comprising:
address lines, control lines, and data lines; processor circuitry coupled to the address lines, control lines, and data lines; peripheral circuitry coupled to the address lines, control lines, and data lines; and trace domain circuity coupled to the address lines, control lines, and data lines, the trace domain circuitry including:
trace controller circuitry having inputs coupled to the address lines, control lines, and data lines, having external control inputs and an external data output, and having internal control inputs and outputs;multiplexer circuitry having inputs coupled with the address lines and the data lines, a control input coupled with an internal control output of the trace controller circuitry, and an output;trace memory circuitry having a data input coupled with the output of the multiplexer circuitry, control inputs and outputs coupled with the internal control inputs and outputs of the trace controller circuitry, and a data output;output circuitry having a data input coupled with the data output of the trace memory circuitry, control inputs and outputs coupled with the internal control inputs and outputs of the trace controller circuitry, and a data output; andbuffer circuitry having a data input coupled with the data output of the output circuitry, a control input coupled with an internal control output of the trace controller circuitry, and an external trace data output. |