| 发明名称 |
PLUG VIA FORMATION BY PATTERNED PLATING AND POLISHING |
| 摘要 |
Solder bump connections and methods for fabricating solder bump connections. A passivation layer is formed on a dielectric layer. A via opening extends through the passivation layer from a top surface of the passivation layer to a metal line in the dielectric layer. A mask on the top surface of the passivation layer includes a mask opening that is aligned with the via opening. A conductive layer is selectively formed in the via opening and the mask opening. The conductive layer projects above the top surface of the passivation layer. The method further includes planarizing the passivation layer and the conductive layer to define a plug in the via opening that is coupled with the metal line. |
| 申请公布号 |
US2015325540(A1) |
申请公布日期 |
2015.11.12 |
| 申请号 |
US201514788945 |
申请日期 |
2015.07.01 |
| 申请人 |
International Business Machines Corporation |
发明人 |
Daubenspeck Timothy H.;Gambino Jeffrey P.;Misra Ekta;Muzzy Christopher D.;Sauter Wolfgang |
| 分类号 |
H01L23/00;H01L23/31;H01L23/48 |
主分类号 |
H01L23/00 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A solder bump connection comprising:
a passivation layer; a via opening extending through the passivation layer; and a plug in the via opening, wherein the plug is comprised of a conductor, the passivation layer includes a top surface that is coplanar with the plug, and the top surface of the passivation layer is free of surface damage. |
| 地址 |
Armonk NY US |
