发明名称 MULTI-MODE LOW-NOISE PIPELINE ADC
摘要 The present invention relates to an analog-to-digital converter (ADC) of a pipeline structure composed of N number of columns including a plurality of multiplying digital-to-analog converters (MDACs) and a plurality of flash ADCs. A multi-mode operation is possible by controlling the number of bits determined in the ADC by sequentially blocking one or more columns including the MDAC and the flash ADC from the last column.
申请公布号 KR20150126178(A) 申请公布日期 2015.11.11
申请号 KR20140053452 申请日期 2014.05.02
申请人 SOGANG UNIVERSITY RESEARCH FOUNDATION 发明人 LEE, SEUNG HOON;PARK, JUN SANG;CHO, SUK HEE
分类号 H04N5/3745 主分类号 H04N5/3745
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