SEMICONDUCTOR DEVICE

摘要

Mesa form first and second p-type base regions (11 and 12) and a floating p-type region (13) are provided in a surface layer of an n - -type drift layer (2). The first p-type base region (11) and floating p-type region (13) are separated by a first trench (5). The second p-type base region (12) is separated from the floating p-type region (13) by a second trench (15). The first and second p-type base regions (11 and 12) are conductively connected to an emitter electrode (9). The floating p-type region (13) is in a floating state electrically isolated from the emitter electrode (9). A first gate electrode (7) is provided via a first gate insulating film (6) inside the first trench (5). An emitter potential second gate electrode (17) is provided via a second gate insulating film (16) inside the second trench (15). Therefore, di/dt controllability when turning on can be increased.