| 摘要 |
<p>This description relates to an electrical power converter including a series connection of two transistors, and provides a technology for, if any sort of defect causes the two transistors to be turned on at the same time, suppressing increase in electrical current flowing through the transistors. An electrical power converter disclosed herein includes a series connection of a first transistor 6a and a second transistor 6b. The electrical power converter includes a clamp circuit 5 configured to inhibit an abnormal rise in gate voltage, the clamp circuit 5 being provided in at least either the first transistor 6a or the second transistor 6b. The clamp circuit 5 includes a diode 14 and a capacitor 15. The diode 14 has an anode connected with a gate G of the transistor. The capacitor 15 has one electrode connected with a cathode of the diode 14 and the other electrode connected with an emitter E of the transistor.</p> |
