发明名称 Display driver circuit and board module including same
摘要 In the case where input terminals of a display driver circuit are compatible with two or more types of interface specifications, an LSI chip, which is the display driver circuit, has some input terminals connected to parallel data lines and its output terminals connected to display lines, and these input terminals and output terminals are arranged along a long side located on the display portion side. In at least one example embodiment, the rest of the input terminals, which are intended for parallel interface, are arranged along a long side located on the FPC board side. With this configuration, the long sides of the LSI chip can be rendered shorter (than in the case where all input terminals are arranged in a row) without causing malfunction.
申请公布号 US9183805(B2) 申请公布日期 2015.11.10
申请号 US201013264081 申请日期 2010.05.12
申请人 Sharp Kabushiki Kaisha 发明人 Imai Masahiro;Nakane Noriyuki
分类号 G09G3/36;G09G3/20;G02F1/1345;H05K1/14 主分类号 G09G3/36
代理机构 Harness, Dickey & Pierce, P.L.C. 代理人 Harness, Dickey & Pierce, P.L.C.
主权项 1. A display driver circuit having a rectangular shape with long sides and short sides, the circuit configured to mount to a transparent substrate including a display portion for displaying images, the display portion located relatively closer to a first one of the long sides of the circuit than a second one of the long sides of the circuit, the circuit comprising: a first input terminal group for receiving first signals based on a first interface specification, the first signals including parallel data signals and parallel clock signals based on a parallel interface specification; a second input terminal group for receiving second signals based on a second interface specification using signals which are lower in amplitude or higher in frequency than in the first interface specification such that each input terminal belongs to only one of the first input terminal group and the second input terminal group, the second signals including serial data signals and serial clock signals based on a serial interface specification; and an output terminal group for providing the display portion with display signals for displaying the images, the output terminal group including all output terminals of the display driver circuit, the display signals being generated based on at least one of the first and second signals, wherein, the output terminal group and at least a part of the first input terminal group are arranged along the first one of the long sides relatively closer to the display portion such that all of the output terminals are arranged along the first one of the long sides and the part of the first input terminal group are arranged apart from a rest of the first input terminal group and the second input terminal group, andthe second input terminal group is arranged along the second one of the long sides.
地址 Osaka JP