发明名称 System and methodology for analog-to-digital converter linearity testing
摘要 A method for testing an analog-to-digital converter is disclosed. In an implementation, the method may include providing input data to analog-to-digital converter circuitry. The analog-to-digital converter circuitry generates an output code based upon the input data. The method includes generating expected output code based upon the corresponding input data and generating an output code error signal based upon the difference of the output code and the expected output code. A predicted code error signal is modeled based upon corresponding code. The method also includes generating a noise error signal representing a difference between the output code error signal and the predicted code error.
申请公布号 US9184759(B1) 申请公布日期 2015.11.10
申请号 US201514611906 申请日期 2015.02.02
申请人 发明人 Yu Zhongjun;Chen Degang
分类号 H03M1/10 主分类号 H03M1/10
代理机构 Advent, LLP 代理人 Benson Tyson B.;Advent, LLP
主权项 1. A system comprising: a signal generator for generating an input signal for analog-to-digital converter circuitry, the analog-to-digital converter circuitry configured to generate an output code based upon the input signal; an expected signal generator module communicatively coupled to the signal generator and configured to communicatively couple to the analog-to-digital converter circuitry, the expected signal generator module for generating an expected output code based upon the input signal; an output code error signal module configured to communicatively couple to the output of the analog-to-digital converter circuitry and to the output of the expected signal generator module, the error signal module for generating an output code error signal representing a difference between the output code and corresponding expected output code; a nonlinearity modeling module communicatively coupled to the output code error signal module, the nonlinearity module for modeling a predicted nonlinearity value based upon the output code; and a nonlinearity error signal module communicatively coupled to the output code error signal module and the nonlinearity modeling module, the nonlinearity error signal module for generating a nonlinearity error value representing a difference between the output code error signal and the corresponding predicted nonlinearity value.
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