发明名称 Data and phase locking buffer design in a two-way handshake system
摘要 A data and phase locking buffer design in a two-way handshake system is provided and may comprise sequentially locking pipelining of data in a synchronized pipeline and draining the synchronized pipeline of the data. The data may be synchronously accepted at a substantially similar time by contiguous pipeline stages that have data to be accepted. A ready signal, which may be processed after being generated by a present pipeline stage of the synchronized pipeline, may be communicated to a subsequent pipeline stage of the synchronized pipeline. An accept signal may be communicated from a present pipeline stage to a previous pipeline stage. A drain signal may be generated for draining the data from the synchronized pipeline. The drain signal may be asserted and deasserted based on end of line information in the data.
申请公布号 US9182993(B2) 申请公布日期 2015.11.10
申请号 US200511140833 申请日期 2005.05.31
申请人 BROADCOM CORPORATION 发明人 Yang Genkun Jason;Prakasam Ramkumar
分类号 G06F9/38;H04N19/42;H04N19/86 主分类号 G06F9/38
代理机构 Foley & Lardner LLP 代理人 Foley & Lardner LLP
主权项 1. A method for processing data in a circuit, the method comprising: sequentially locking pipelining of data in a synchronized pipeline; and draining said synchronized pipeline of said data, wherein said draining is based on video end of line information in said data.
地址 Irvine CA US