Bitstream buffer manipulation with a SIMD merge instruction

摘要

Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.

主权项

1. A system comprising:
a processor comprising:
a plurality of registers to store 128-bit operands;a decoder to decode a single instruction multiple data (SIMD) instruction, the SIMD instruction to indicate a first 128-bit operand having a first set of sixteen byte elements and a second 128-bit operand having a second set of sixteen byte elements, the SIMD instruction to have a 4-bit immediate to specify a number (n) of bytes; andan execution unit coupled with the decoder and the plurality of registers, the execution unit in response to the SIMD instruction to store a 128-bit result in a destination indicated by the SIMD instruction, wherein the result is to includethe number (n) least significant byte elements of the second operand in the number (n) most significant bytes of the result,concatenated with sixteen minus the number (n) most significant byte elements of the first operand in sixteen minus the number (n) least significant bytes of the result; a flash memory interface coupled with the processor; a synchronous dynamic random access memory (SDRAM) interface coupled with the processor; a universal serial bus (USB) interface coupled with the processor; and a Bluetooth wireless universal asynchronous receiver/transmitter (UART) interface coupled with the processor.