发明名称 Multiprocessor system and method for managing cache memory thereof
摘要 A multiprocessor system includes a plurality of master devices, at least one slave device, and a system bus connecting the master devices to the at least one slave device. At least one of the master devices includes at least one cache memory, and the system bus processes a data write or data read request corresponding a transaction issued to the slave device from at least one of the master devices prior to termination of a snooping operation on the master devices.
申请公布号 US9183149(B2) 申请公布日期 2015.11.10
申请号 US201313793023 申请日期 2013.03.11
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 Park Il;Joo Young Pyo
分类号 G06F12/00;G06F12/08 主分类号 G06F12/00
代理机构 F. Chau & Associates, LLC 代理人 F. Chau & Associates, LLC
主权项 1. A multiprocessor system comprising: a plurality of master devices, wherein at least one of the master devices comprises at least one cache memory; at least one slave device; and a system bus configured to connect the master devices to the at least one slave device, wherein the system bus grants an access right to the slave device to one of the master devices prior to termination of a snooping operation on the master devices.
地址 Suwon-Si, Gyeonggi-Do KR