Chip package and method for forming the same

摘要

A method for forming a chip package, by providing a substrate having a plurality of conducting pads below a lower surface, and a dielectric layer located between the conducting pads, forming a recess in an upper surface of the substrate, forming a hole extending through the bottom of the recess, forming an insulating layer on the sidewall of the recess and in the hole, exposing a portion of the conducting pads through the insulating layer, and forming a conducting layer on the insulating layer and through the hole to contact with the conducting pads.

主权项

1. A method for forming a chip package, comprising:
providing a substrate having an upper surface and a lower surface; forming a plurality of conducting pads located below the lower surface of the substrate; forming a dielectric layer located between the conducting pads; forming a recess extending from the upper surface towards the lower surface of the substrate, wherein the recess has a bottom in the substrate; forming a hole extending from the bottom of the recess towards the lower surface of the substrate; and forming a conducting layer in the hole, wherein the conducting layer electrically contacts with at least one of the conducting pads.