Latch-up suppression and substrate noise coupling reduction through a substrate back-tie for 3D integrated circuits

摘要

Roughly described, an integrated circuit device has a conductor extending entirely through the substrate, connected on one end to the substrate topside surface and on the other end to the substrate backside surface. In various embodiments the conductor is insulated from all RDL conductors on the backside of the substrate, and/or is insulated from all conductors and device features on any below-adjacent chip in a 3D integrated circuit structure. Methods of fabrication are also described.

主权项

1. An integrated circuit device comprising:
a first semiconductor substrate having opposite topside and backside surfaces, the first semiconductor substrate having a transistor therein; and a first conductor extending entirely through the first substrate, the first conductor being electrically connected on a first end to a first point on the first substrate topside surface and on a second end to a second point on the first substrate backside surface, wherein the first substrate comprises a p-type lightly doped substrate and a p-type heavily doped contact pad at the first substrate topside surface, wherein the first point is on the p-type heavily doped contact pad.