发明名称 Voltage optimization circuit and managing voltage margins of an integrated circuit
摘要 A voltage margin controller, an IC included the same and a method of controlling voltage margin for a voltage domain of an IC are disclosed herein. In one embodiment, the voltage margin controller includes: (1) monitoring branches including circuit function indicators configured to indicate whether circuitry in the voltage domain could operate at corresponding candidate reduced voltage levels and (2) a voltage margin adjuster coupled to the monitoring branches and configured to develop a voltage margin adjustment for a voltage regulator of the voltage domain based upon an operating number of the circuit function indicators.
申请公布号 US9182768(B2) 申请公布日期 2015.11.10
申请号 US201414149915 申请日期 2014.01.08
申请人 Nvidia Corporation 发明人 Smith Brian L.;Felix Stephen;Guss Jesse Max;Raja Tezaswi
分类号 G05F1/10;G05F3/02;G05F1/46 主分类号 G05F1/10
代理机构 代理人
主权项 1. A voltage margin controller located in a voltage domain and comprising: monitoring branches including circuit function indicators configured to indicate whether circuitry in said voltage domain could operate at corresponding candidate reduced voltage levels; and a voltage margin adjuster coupled to said monitoring branches and configured to develop a voltage margin adjustment for a voltage regulator of said voltage domain based upon a comparison of an operating number of said circuit function indicators to a minimum passing threshold and a maximum passing threshold, wherein a value of said voltage margin adjustment is a total voltage drop of a lowest level passing branch of said monitoring branches that complies with said minimum and said maximum thresholds.
地址 Santa Clara CA US