发明名称 Memory system that utilizes a wide input/output (I/O) interface to interface memory storage with an interposer
摘要 A memory system is provided in which at least one memory chip and a memory controller chip are mounted in a side-by-side relationship on an interposer. The memory chip is connected to the interposer via a Wide I/O interface to enable the memory chip and the memory controller chip to communicate with each other via the Wide I/O interface. The memory controller chip has an interface for communicating with an interface of an integrated circuit (IC) chip of the memory system.
申请公布号 US9182925(B2) 申请公布日期 2015.11.10
申请号 US201314133887 申请日期 2013.12.19
申请人 Avago Technologies General IP (Singapore) Pte. Ltd. 发明人 Thayer Larry J.
分类号 G11C5/06;G06F3/06;G06F13/16;G11C5/04 主分类号 G11C5/06
代理机构 代理人
主权项 1. A memory system comprising: an interposer comprising a silicon substrate having electrical conductors extending laterally through the interposer and vias that extend vertically through the interposer; at least a first memory chip mounted on an upper surface of the interposer and electrically interconnected with the interposer; a memory controller chip mounted on the upper surface of the interposer and electrically interconnected with the interposer, wherein the memory controller chip and the at least a first memory chip are electrically interconnected with each other via the interposer, and wherein the electrical interconnection between the at least a first memory chip and the interposer and the electrical interconnection between the memory controller chip and the interposer provide a first Wide input/output (I/O) interface between the at least a first memory chip and the memory controller chip; and a circuit board comprising a substrate having at least an upper surface and a lower surface, wherein the electrical interconnection between the circuit board and the interposer comprises a plurality of electrically-conductive bumps disposed in between the upper surface of the circuit board and a lower surface of the interposer, a plurality of electrically-conductive contact pads disposed on a lower surface of the interposer, and a plurality of electrically-conductive pads disposed on the upper surface of the circuit board, wherein the electrically-conductive bumps provide an electrical interconnection between the electrically conductive pads disposed on the lower surface of the interposer and the electrically-conductive contact pads disposed on the upper surface of the circuit board.
地址 Singapore SG