发明名称 |
Methods of manufacturing semiconductor devices having self-aligned contact pads |
摘要 |
A semiconductor device includes a substrate having a field area that defines active areas, gate trenches in the substrate and extending in a first direction, a buried gate in a respective gate trench, gate capping fences in a respective gate trench over a respective buried gate, the gate capping fences protruding from top surfaces of the active areas and extending in the first direction, bit line trenches in the gate capping fences, a respective bit line trench crossing the gate capping fences and extending in a second direction perpendicular to the first direction, an insulator structure on inner walls of a respective bit line trench, bit lines and bit line capping patterns stacked on the insulator structures in a respective bit line trench, contact pads self-aligned with the gate capping fences and on the substrate between the adjacent bit lines, and a lower electrode of a capacitor on a respective contact pad. |
申请公布号 |
US9184227(B1) |
申请公布日期 |
2015.11.10 |
申请号 |
US201414529500 |
申请日期 |
2014.10.31 |
申请人 |
Samsung Electronics Co., Ltd. |
发明人 |
Kim Young-Kuk;Im Ki-Vin;Lim Han-Jin;Hwang In-Seak |
分类号 |
H01L21/336;H01L49/02;H01L21/8234 |
主分类号 |
H01L21/336 |
代理机构 |
Myers Bigel Sibley & Sajovec, P.A. |
代理人 |
Myers Bigel Sibley & Sajovec, P.A. |
主权项 |
1. A method of manufacturing a semiconductor device, the method comprising:
forming a field area that defines active areas in a substrate; forming gate trenches that extend in a first direction in the substrate; forming buried gates in the gate trenches; forming gate capping fences in the gate trenches on a respective buried gate, the gate capping fences protruding from top surfaces of the active areas and extending in the first direction; forming line-shaped pad patterns self-aligned with the gate capping fences and extending in the first direction on the substrate; forming contact pads and bit line trenches by patterning a part of the pad patterns and the gate capping fences to expose at least some areas of the substrate between adjacent gate capping fences, wherein a respective contact pad is formed on the substrate between the adjacent bit line trenches and a respective bit line trench extends in a second direction perpendicular to the first direction; forming a bit line in a respective bit line trench; and forming a lower electrode of a capacitor on a respective contact pad. |
地址 |
KR |