| 发明名称 |
Single-event upset mitigation in circuit design for programmable integrated circuits |
| 摘要 |
In an example, a method of implementing a circuit design for a programmable integrated circuit (IC) begins by identifying combinatorial logic functions of the circuit design. The method maps, according to a first constraint, a first threshold percentage of the combinatorial logic functions onto a first type of lookup tables (LUTs) of the programmable IC in favor of second type of LUTs of the programmable IC, the second type of LUTs being more susceptible to single event upsets than the first type of LUTs. The method generates a first physical implementation of the circuit design for the programmable IC based on the mapping. |
| 申请公布号 |
US9183338(B1) |
申请公布日期 |
2015.11.10 |
| 申请号 |
US201414487286 |
申请日期 |
2014.09.16 |
| 申请人 |
XILINX, INC. |
发明人 |
Jain Praful;Maillard Pierre |
| 分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
| 代理机构 |
|
代理人 |
Brush Robert |
| 主权项 |
1. A method of implementing a circuit design for a programmable integrated circuit (IC), comprising:
identifying combinatorial logic functions of the circuit design; mapping, according to a first constraint, a first threshold percentage of the combinatorial logic functions onto a first type of lookup tables (LUTs) of the programmable IC in favor of second type of LUTs of the programmable IC, the second type of LUTs being more susceptible to single event upsets than the first type of LUTs; and generating a first physical implementation of the circuit design for the programmable IC based on the mapping. |
| 地址 |
San Jose CA US |
