| 主权项 |
1. A display driver, comprising:
a differential amplifier, wherein said differential amplifier comprises:
a first differential pair of transistors configured to receive a differential input signal;a first constant current source connected with said first differential pair of transistors;a first switch connected in parallel with said first constant current source and configured to increase a current which flows through said first differential pair of transistors, in response to a first control signal which is active for a first time period in a level transition of an output signal of the differential amplifier corresponding to a switching of a state of the differential input signal,a second differential pair of transistors configured to receive said differential input signal;a second constant current source connected with said second differential pair of transistors; anda second switch connected in parallel with said second constant current source and configured to increase a current which flows through said second differential pair of transistors, in response to a second control signal which is active for a second time period in a level transition of the output signal corresponding to a switching of a state of the differential input signal, wherein the first time period in a level transition of the output signal is a time period during a transition of said output signal from a high voltage to a low voltage, wherein the first control signal is not active for the second time period in a level transition of the output signal of the differential amplifier corresponding to a switching of a state of the differential input signal, wherein the second time period in a level transition of the output signal is a time period during a transition of said output signal from a low voltage to a high voltage, wherein initialization of rising and falling edges of the level transition of the output signal of the differential amplifier corresponding to a switching of a state of the differential input signal occurs in synchronization with initialization of rising and falling edges of a synchronization signal, wherein initialization of falling edges of the first control signal occurs in synchronization with initialization of both rising edges of one of even and odd pulses of the synchronization signal and rising edges of the output signal, wherein initialization of rising edges of the second control signal occurs in synchronization with initialization of both rising edges of the other of said even and odd pulses of the synchronization signal and falling edges of the output signal, wherein the second control signal is not active for the first time period in a level transition of the output signal of the differential amplifier corresponding to a switching of a state of the differential input signal, and wherein said first and second time periods are shorter than each of pulses of said synchronization signal. |
