ANTENNA EFFECT DISCHARGE CIRCUIT AND MANUFACTURING METHOD

摘要

An antenna effect discharge circuit is described for a device having patterned conductor layers, which may be exposed to charge inducing environments during a manufacturing process. The antenna effect discharge circuit has a terminal that is connected to a node on the device to be protected from charge accumulation and a gate, such as the gate of a field effect transistor in the circuit, and a terminal through which accumulated charge can be discharged to the substrate. A capacitor couples the gate in the antenna effect discharge circuit to the substrate. A voltage supply circuit is configured to provide voltage sufficient to bias the antenna effect discharge circuit in an off condition during operation of the device. A patterned conductor in the upper layer, and preferably the uppermost layer, of the device links the gate in the antenna effect discharge circuit to the voltage supply circuit.

主权项

1. A device, comprising:
a substrate; a plurality of layers of patterned conductors and interlayer connectors on the substrate, the plurality of layers including an upper layer and one or more lower layers; an antenna effect discharge circuit on the substrate having a gate; a capacitor having a first terminal in, or connected to, the substrate, and a second terminal connected to the gate; a voltage supply circuit configured to provide a voltage sufficient to bias the antenna effect discharge circuit in an off condition during operation; and a patterned conductor in the upper layer linking the gate to the voltage supply circuit.