3D STACKED-CHIP PACKAGE

摘要

Disclosed herein is a package comprising a first die, a second die, and an insulating film extending along sidewalls of the first die or the second die. The first die includes a first redistribution layer (RDL) disposed on a first semiconductor substrate and a conductive element in the first RDL. The second die includes a second RDL disposed on a second semiconductor substrate, wherein the first RDL is bonded to the second RDL. The package further includes a via extending from the conductive elements through the first semiconductor substrate and a spacer interposed between the first semiconductor substrate and the via. The first spacer extends from the conductive element through the first semiconductor substrate.

主权项

1. A package comprising:
a first die comprising:
a first redistribution layer (RDL) disposed on a first semiconductor substrate; anda first conductive element in the first RDL; a second die comprising a second RDL disposed on a second semiconductor substrate, wherein the first RDL is bonded to the second RDL; an insulating film extending along sidewalls of the first die or the second die; a first via extending from the first conductive elements through the first semiconductor substrate; and a first spacer interposed between the first semiconductor substrate and the first via, wherein the first spacer extends from the first conductive element through the first semiconductor substrate.