CAPACITANCE MULTIPLIER AND METHOD

摘要

Capacitance multiplier circuitry provides an increased equivalent capacitance, and may be implemented using a desirably small footprint. As may be implemented in accordance with one or more embodiments, a capacitor provides a first capacitance across first and second plates, and capacitance multiplier circuitry operates with the capacitor to provide a second equivalent capacitance that is a multiple of the first capacitance. The capacitance multiplier circuitry includes a first circuit path having a first resistor between the first plate and a common terminal, and a second circuit path having a switch and a second resistor between the second plate and the common terminal. An amplifier has differential inputs respectively corresponding to the first and second circuit paths and provides the second equivalent capacitance by controlling operation of the switch based upon the differential inputs and the respective resistances provided by the resistors in the first and second circuit paths.

主权项

1. An apparatus comprising:
a capacitor circuit configured and arranged to provide a first capacitance across first and second capacitor plates; and capacitance multiplier circuitry configured and arranged with the capacitor circuit to provide a second equivalent capacitance that is a multiple of the first capacitance, the capacitance multiplier circuitry including:
a first circuit path having a first resistor circuit between the first capacitor plate and a common terminal;a second circuit path having a switch and a second resistor circuit coupled between the second capacitor plate and the common terminal; andan amplifier circuit having differential inputs respectively corresponding to the first and second circuit paths and being configured and arranged to provide the second equivalent capacitance by controlling operation of the switch via an output of the amplifier circuit, based upon the differential inputs and the respective resistances provided by the resistor circuits in the first and second circuit paths.