| 摘要 |
An electroplated copper film treatment method for use in a semiconductor-copper interconnect process. In a copper-rear path interconnect process, a first annealing treatment is performed at no greater than 180 °C on an electroplated copper film, then, when the copper-rear path interconnect process is completed, an additional whole-chip annealing is performed at a relatively high temperature no less than 240 °C on the electroplated copper film. This allows recrystallization of the copper to reduce the electrical resistivity of the electroplated copper film and allows for formation of an interface state of a lower electrical resistivity at a bottom interface of a via, thus improving the contact resistance between the via and a lower-layer copper interconnect and further reducing the RC delay of the via. The method is applicable in a Cu/Low-k rear path interconnect technique and is compatible with standard Cu/Low-k rear path process integration. |
